#ifndef __REG_H__

#define __REG_H__


// ARM-CORTEXT-M4 REG ADDRESS SPACE

//systick regs
#define STK_CTRL_REG             (*(volatile uint32_t *) 0xE000E010) 
#define STK_LOAD_REG             (*(volatile uint32_t *) 0xE000E014)     
#define STK_VAL_REG              (*(volatile uint32_t *) 0xE000E018) 
#define STK_CALIB_REG            (*(volatile uint32_t *) 0xE000E01C) 


//nvic regs
#define NVIC_BASE                (0xE000E100)
#define NVIC_ISER0_REG           (*(volatile uint32_t *)(NVIC_BASE+0x100))
#define NVIC_ISER1_REG           (*(volatile uint32_t *)(NVIC_BASE+0x104))
#define NVIC_ISER2_REG           (*(volatile uint32_t *)(NVIC_BASE+0x108))
#define NVIC_ISER3_REG           (*(volatile uint32_t *)(NVIC_BASE+0x10C))
#define NVIC_ISER4_REG           (*(volatile uint32_t *)(NVIC_BASE+0x110))
#define NVIC_ISER5_REG           (*(volatile uint32_t *)(NVIC_BASE+0x114))
#define NVIC_ISER6_REG           (*(volatile uint32_t *)(NVIC_BASE+0x118))
#define NVIC_ISER7_REG           (*(volatile uint32_t *)(NVIC_BASE+0x11C))


#define NVIC_ICER0_REG           (*(volatile uint32_t *)(NVIC_BASE+0x180))
#define NVIC_ICER1_REG           (*(volatile uint32_t *)(NVIC_BASE+0x184))
#define NVIC_ICER2_REG           (*(volatile uint32_t *)(NVIC_BASE+0x188))
#define NVIC_ICER3_REG           (*(volatile uint32_t *)(NVIC_BASE+0x18C))
#define NVIC_ICER4_REG           (*(volatile uint32_t *)(NVIC_BASE+0x190))
#define NVIC_ICER5_REG           (*(volatile uint32_t *)(NVIC_BASE+0x194))
#define NVIC_ICER6_REG           (*(volatile uint32_t *)(NVIC_BASE+0x198))
#define NVIC_ICER7_REG           (*(volatile uint32_t *)(NVIC_BASE+0x19C))


#define NVIC_ISPR0_REG           (*(volatile uint32_t *)(NVIC_BASE+0x200))
#define NVIC_ISPR1_REG           (*(volatile uint32_t *)(NVIC_BASE+0x204))
#define NVIC_ISPR2_REG           (*(volatile uint32_t *)(NVIC_BASE+0x208))
#define NVIC_ISPR3_REG           (*(volatile uint32_t *)(NVIC_BASE+0x20C))
#define NVIC_ISPR4_REG           (*(volatile uint32_t *)(NVIC_BASE+0x210))
#define NVIC_ISPR5_REG           (*(volatile uint32_t *)(NVIC_BASE+0x214))
#define NVIC_ISPR6_REG           (*(volatile uint32_t *)(NVIC_BASE+0x218))
#define NVIC_ISPR7_REG           (*(volatile uint32_t *)(NVIC_BASE+0x21C))


#define NVIC_ICPR0_REG           (*(volatile uint32_t *)(NVIC_BASE+0x280))
#define NVIC_ICPR1_REG           (*(volatile uint32_t *)(NVIC_BASE+0x284))
#define NVIC_ICPR2_REG           (*(volatile uint32_t *)(NVIC_BASE+0x288))
#define NVIC_ICPR3_REG           (*(volatile uint32_t *)(NVIC_BASE+0x28C))
#define NVIC_ICPR4_REG           (*(volatile uint32_t *)(NVIC_BASE+0x290))
#define NVIC_ICPR5_REG           (*(volatile uint32_t *)(NVIC_BASE+0x294))
#define NVIC_ICPR6_REG           (*(volatile uint32_t *)(NVIC_BASE+0x298))
#define NVIC_ICPR7_REG           (*(volatile uint32_t *)(NVIC_BASE+0x29C))


#define NVIC_IABR0_REG           (*(volatile uint32_t *)(NVIC_BASE+0x300))
#define NVIC_IABR1_REG           (*(volatile uint32_t *)(NVIC_BASE+0x304))
#define NVIC_IABR2_REG           (*(volatile uint32_t *)(NVIC_BASE+0x308))
#define NVIC_IABR3_REG           (*(volatile uint32_t *)(NVIC_BASE+0x30C))
#define NVIC_IABR4_REG           (*(volatile uint32_t *)(NVIC_BASE+0x310))
#define NVIC_IABR5_REG           (*(volatile uint32_t *)(NVIC_BASE+0x314))
#define NVIC_IABR6_REG           (*(volatile uint32_t *)(NVIC_BASE+0x318))
#define NVIC_IABR7_REG           (*(volatile uint32_t *)(NVIC_BASE+0x31C))


#define NVIC_IPR_OFFSET   		 0x400
#define NVIC_IPR0_REG            (*(volatile uint32_t *)(NVIC_BASE+0x400))
#define NVIC_IPR1_REG            (*(volatile uint32_t *)(NVIC_BASE+0x404))
#define NVIC_IPR2_REG            (*(volatile uint32_t *)(NVIC_BASE+0x408))
#define NVIC_IPR3_REG            (*(volatile uint32_t *)(NVIC_BASE+0x40C))
#define NVIC_IPR4_REG            (*(volatile uint32_t *)(NVIC_BASE+0x410))
#define NVIC_IPR5_REG            (*(volatile uint32_t *)(NVIC_BASE+0x414))
#define NVIC_IPR6_REG            (*(volatile uint32_t *)(NVIC_BASE+0x418))
#define NVIC_IPR7_REG            (*(volatile uint32_t *)(NVIC_BASE+0x41C))
//  >>>>>>>>
#define NVIC_IPR58_REG           (*(volatile uint32_t *)(NVIC_BASE+0x4E8))
#define NVIC_IPR59_REG           (*(volatile uint32_t *)(NVIC_BASE+0x4EC))


#define NVIC_STIR_REG  	         (*(volatile uint32_t *)(NVIC_BASE+0xE00))





//  ST  REGS  ADDRESS SPACE
#define  RCC_CR       		    (*(volatile uint32_t *) 0x40021000)
#define  RCC_CFGR       		(*(volatile uint32_t *) 0x40021008)
#define  RCC_PLLCFGR       		(*(volatile uint32_t *) 0x4002100C)
#define  RCC_CIER      		    (*(volatile uint32_t *) 0x40021018)

#define  RCC_AHB2RSTR			(*(volatile uint32_t *)0x4002102C)
#define  RCC_AHB2ENR      		(*(volatile uint32_t *)0x4002104C)
#define  RCC_APB1ENR1      		(*(volatile uint32_t *)0x40021058)
#define  RCC_APB1ENR2      		(*(volatile uint32_t *)0x4002105C)
#define  RCC_APB2ENR      		(*(volatile uint32_t *)0x40021060)
#define  RCC_CCIPR     			(*(volatile uint32_t *)0x40021088)



#define  GPIOE     				(*(volatile uint32_t *) 0x48001000)
#define  GPIOE_MODER			(*(volatile uint32_t *) 0x48001000)
#define  GPIOE_OTYPER			(*(volatile uint32_t *) 0x48001004)
#define  GPIOE_OSPEEDR			(*(volatile uint32_t *) 0x48001008)
#define  GPIOE_PUPDR			(*(volatile uint32_t *) 0x4800100C)
#define  GPIOE_ODR				(*(volatile uint32_t *) 0x48001014)


#define GPIOA                   (*(volatile uint32_t *)0x48000000)
#define GPIOA_MODER             (*(volatile uint32_t *)0x48000000)
#define GPIOA_OTYPER            (*(volatile uint32_t *)0x48000004)
#define GPIOA_OSPEEDR           (*(volatile uint32_t *)0x48000008)
#define GPIOA_PUPDR             (*(volatile uint32_t *)0x4800000C)
#define GPIOA_ODR               (*(volatile uint32_t *)0x48000014) 
#define GPIOA_AFRL              (*(volatile uint32_t *)0x48000020)
#define GPIOA_AFRH              (*(volatile uint32_t *)0x48000024)



#define  USART1_ADDR    		0x40013800 
#define  USART1      			(*(volatile uint32_t *)(USART1_ADDR))
#define  USART1_CR1     		(*(volatile uint32_t *)(USART1_ADDR+0x00))
#define  USART1_CR2     		(*(volatile uint32_t *)(USART1_ADDR+0x04))
#define  USART1_CR3     		(*(volatile uint32_t *)(USART1_ADDR+0x08))
#define  USART1_BRR     		(*(volatile uint32_t *)(USART1_ADDR+0x0C))
#define  USART1_GTPR    		(*(volatile uint32_t *)(USART1_ADDR+0x10))
#define  USART1_RTOR    		(*(volatile uint32_t *)(USART1_ADDR+0x14))
#define  USART1_RQR     		(*(volatile uint32_t *)(USART1_ADDR+0x18))
#define  USART1_ISR     		(*(volatile uint32_t *)(USART1_ADDR+0x1C))
#define  USART1_ICR     		(*(volatile uint32_t *)(USART1_ADDR+0x20))
#define  USART1_RDR     		(*(volatile uint32_t *)(USART1_ADDR+0x24))
#define  USART1_TDR     		(*(volatile uint32_t *)(USART1_ADDR+0x28))



#endif
